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DATE
2005
IEEE
164views Hardware» more  DATE 2005»
15 years 5 months ago
Fast and Accurate Transaction Level Modeling of an Extended AMBA2.0 Bus Architecture
Transaction Level Modeling (TLM) approach is used to meet the simulation speed as well as cycle accuracy for large scale SoC performance analysis. We implemented a transaction-lev...
Young-Taek Kim, Taehun Kim, Youngduk Kim, Chulho S...
VALUETOOLS
2006
ACM
236views Hardware» more  VALUETOOLS 2006»
15 years 10 months ago
The DISCO network calculator: a toolbox for worst case analysis
In this paper we describe the design, implementation, and analytical background of the DISCO Network Calculator. The DISCO Network Calculator is an open-source toolbox written in ...
Jens B. Schmitt, Frank A. Zdarsky
DATE
2003
IEEE
135views Hardware» more  DATE 2003»
15 years 9 months ago
Estimation of Bus Performance for a Tuplespace in an Embedded Architecture
This paper describes a design methodology for the estimation of bus performance of a tuplespace for factory automation. The need of a tuplespace is motivated by the characteristic...
Nicola Drago, Franco Fummi, Marco Monguzzi, Giovan...
ISCAS
1999
IEEE
110views Hardware» more  ISCAS 1999»
15 years 8 months ago
Receiver-based congestion control mechanism for Internet video transmission
Efficient transmission of delay-stringent video over the Internet is examined in this work. In our design, an end user adjusts the network load depending on the perceived network ...
Yon Jun Chung, Young-Gook Kim, JongWon Kim, C. C. ...
DELTA
2004
IEEE
15 years 7 months ago
Towards Analog and Mixed-Signal SOC Design with SystemC-AMS
Systems-on-Chip (SoCs) are heterogeneous by nature as they may integrate digital, analog, RF hardware as well as software components or non electrical parts such as sensors or act...
Alain Vachoux, Christoph Grimm, Karsten Einwich