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115
Voted
ISCA
2009
IEEE
230views Hardware» more  ISCA 2009»
15 years 10 months ago
Architecting phase change memory as a scalable dram alternative
Memory scaling is in jeopardy as charge storage and sensing mechanisms become less reliable for prevalent memory technologies, such as DRAM. In contrast, phase change memory (PCM)...
Benjamin C. Lee, Engin Ipek, Onur Mutlu, Doug Burg...
106
Voted
DSD
2007
IEEE
86views Hardware» more  DSD 2007»
15 years 10 months ago
On network-on-chip comparison
— This paper presents the state-of-the-art in the field of network-on-chip (NoC) benchmarking and comparison. The study identifies the mainstream approaches, how NoCs are curre...
Erno Salminen, Ari Kulmala, Timo D. Hämä...
ASYNC
2005
IEEE
96views Hardware» more  ASYNC 2005»
15 years 9 months ago
GasP Control for Domino Circuits
We present two novel asynchronous control circuits for domino pipelines. The control circuits are based on GasP circuits, have a minimum cycle time of six gate delays, and compare...
Jo C. Ebergen, Jonathan Gainsley, Jon K. Lexau, Iv...
DATE
2005
IEEE
103views Hardware» more  DATE 2005»
15 years 9 months ago
Noise Figure Evaluation Using Low Cost BIST
A technique for evaluating noise figure suitable for BIST implementation is described. It is based on a low cost single-bit digitizer, which allows the simultaneous evaluation of ...
Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Su...
ASIACRYPT
2003
Springer
15 years 9 months ago
Factoring Estimates for a 1024-Bit RSA Modulus
We estimate the yield of the number field sieve factoring algorithm when applied to the 1024-bit composite integer RSA-1024 and the parameters as proposed in the draft version [17...
Arjen K. Lenstra, Eran Tromer, Adi Shamir, Wil Kor...