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IWSOC
2005
IEEE
121views Hardware» more  IWSOC 2005»
14 years 3 months ago
Open HW, Open Design SW, and the VC Ecosystem Dilemma
The open model for solutions development is quickly extending from software to other technology areas, such as hardware and services. Specifically, just as open source has spawned...
Juan Antonio Carballo
ICCD
2006
IEEE
118views Hardware» more  ICCD 2006»
14 years 7 months ago
A System-level Network-on-Chip Simulation Framework Integrated with Low-level Analytical Models
—This paper presents a system-level Network-on-Chip modeling framework that integrates transaction-level model and analytical wire model for design space exploration. It enables ...
Jinwen Xi, Peixin Zhong
DATE
2006
IEEE
104views Hardware» more  DATE 2006»
14 years 4 months ago
Pre-synthesis optimization of multiplications to improve circuit performance
Conventional high-level synthesis uses the worst case delay to relate all inputs to all outputs of an operation. This is a very conservative approximation of reality, especially i...
Rafael Ruiz-Sautua, María C. Molina, Jos&ea...
IV
2009
IEEE
124views Visualization» more  IV 2009»
14 years 4 months ago
Needs Assessment for the Design of Information Synthesis Visual Analytics Tools
Information synthesis is a key portion of the analysis process with visual analytics tools. This stage of work requires users to collect, organize, and add meaning to individual a...
Anthony C. Robinson
FPL
2009
Springer
132views Hardware» more  FPL 2009»
14 years 2 months ago
Binary Synthesis with multiple memory banks targeting array references
High-Level Synthesis (HLS) is the field of transforming a high-level programming language, such as C, into a register transfer level(RTL) description of the design. In HLS, Binary...
Yosi Ben-Asher, Nadav Rotem