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» Hardware Synthesis from C C Models
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MTV
2005
IEEE
128views Hardware» more  MTV 2005»
14 years 3 months ago
Automated Extraction of Structural Information from SystemC-based IP for Validation
The increasing complexity and size of system level design models introduces a difficult challenge for validating them. Hence, in most industries, design validation takes a large p...
David Berner, Hiren D. Patel, Deepak Mathaikutty, ...
ASYNC
2001
IEEE
164views Hardware» more  ASYNC 2001»
14 years 1 months ago
Synthesis and Implementation of a Signal-Type Asynchronous Data Communication Mechanism
This paper describes the synthesis and hardware implementation of a signal-type asynchronous data communication mechanism (ACM). Such an ACM can be used in systems where a data-dr...
Alexandre Yakovlev, Fei Xia, Delong Shang
ICCAD
2002
IEEE
124views Hardware» more  ICCAD 2002»
14 years 7 months ago
Symbolic pointer analysis
— One of the bottlenecks in the recent movement of hardware synthesis from behavioral C programs is the difficulty in reasoning about runtime pointer values at compile time. The...
Jianwen Zhu
DSD
2006
IEEE
110views Hardware» more  DSD 2006»
14 years 4 months ago
A Flexible, Syntax Independent Representation (SIR) for System Level Design Models
System Level Design (SLD) is widely seen as a solution for bridging the gap between chip complexity and design productivity of Systems on Chip (SoC). SLD relieves the designer fro...
Ines Viskic, Rainer Dömer
DATE
2009
IEEE
126views Hardware» more  DATE 2009»
14 years 5 months ago
Fast and accurate protocol specific bus modeling using TLM 2.0
—The need to have Transaction Level models early in the design cycle is becoming more and more important to shorten the development times of complex Systems-on-Chip (SoC). These ...
H. W. M. van Moll, Henk Corporaal, Víctor R...