Sciweavers

974 search results - page 163 / 195
» Hardware Synthesis from Term Rewriting Systems
Sort
View
ASPLOS
2010
ACM
14 years 4 months ago
Addressing shared resource contention in multicore processors via scheduling
Contention for shared resources on multicore processors remains an unsolved problem in existing systems despite significant research efforts dedicated to this problem in the past...
Sergey Zhuravlev, Sergey Blagodurov, Alexandra Fed...
ISCA
2010
IEEE
214views Hardware» more  ISCA 2010»
13 years 12 months ago
Translation caching: skip, don't walk (the page table)
This paper explores the design space of MMU caches that accelerate virtual-to-physical address translation in processor architectures, such as x86-64, that use a radix tree page t...
Thomas W. Barr, Alan L. Cox, Scott Rixner
ASPLOS
2012
ACM
12 years 5 months ago
A case for unlimited watchpoints
Numerous tools have been proposed to help developers fix software errors and inefficiencies. Widely-used techniques such as memory checking suffer from overheads that limit thei...
Joseph L. Greathouse, Hongyi Xin, Yixin Luo, Todd ...
SIGMETRICS
2011
ACM
191views Hardware» more  SIGMETRICS 2011»
13 years 24 days ago
Stability analysis of QCN: the averaging principle
Data Center Networks have recently caused much excitement in the industry and in the research community. They represent the convergence of networking, storage, computing and virtu...
Mohammad Alizadeh, Abdul Kabbani, Berk Atikoglu, B...
SIGMETRICS
2009
ACM
157views Hardware» more  SIGMETRICS 2009»
14 years 4 months ago
Delay tolerant bulk data transfers on the internet
Many emerging scientific and industrial applications require transferring multiple Tbytes of data on a daily basis. Examples include pushing scientific data from particle accele...
Nikolaos Laoutaris, Georgios Smaragdakis, Pablo Ro...