Sciweavers

46 search results - page 3 / 10
» Hardware and a Tool Chain for ADRES
Sort
View
HVC
2007
Springer
153views Hardware» more  HVC 2007»
13 years 11 months ago
On the Architecture of System Verification Environments
Implementations of computer systems comprise many layers and employ a variety of programming languages. Building such systems requires support of an often complex, accompanying too...
Mark A. Hillebrand, Wolfgang J. Paul
FPL
2003
Springer
161views Hardware» more  FPL 2003»
14 years 21 days ago
Laura: Leiden Architecture Research and Exploration Tool
At Leiden Embedded Research Center (LERC), we are building a tool chain called Compaan/Laura that allows us to map fast and efficiently applications written in Matlab onto recon...
Claudiu Zissulescu, Todor Stefanov, Bart Kienhuis,...
ATS
2004
IEEE
87views Hardware» more  ATS 2004»
13 years 11 months ago
Low Power BIST with Smoother and Scan-Chain Reorder
In this paper, we propose a low-power testing methodology for the scan-based BIST. A smoother is included in the test pattern generator (TPG) to reduce average power consumption d...
Nan-Cheng Lai, Sying-Jyan Wang, Yu-Hsuan Fu
ATVA
2007
Springer
115views Hardware» more  ATVA 2007»
14 years 1 months ago
A Compositional Semantics for Dynamic Fault Trees in Terms of Interactive Markov Chains
Abstract. Dynamic fault trees (DFTs) are a versatile and common formalism to model and analyze the reliability of computer-based systems. This paper presents a formal semantics of ...
Hichem Boudali, Pepijn Crouzen, Mariëlle Stoe...
FPL
2004
Springer
95views Hardware» more  FPL 2004»
14 years 26 days ago
Increasing Pipelined IP Core Utilization in Process Networks Using Exploration
At Leiden Embedded Research Center, we are building a tool chain called Compaan/Laura that allows us to do fast mapping of applications written in Matlab onto reconfigurable platf...
Claudiu Zissulescu, Bart Kienhuis, Ed F. Depretter...