951 search results - page 38 / 191 » Hardware design experiences in ZebraNet |
TOMACS
1998
13 years 7 months ago
1998
architectures at multiple levels of abstraction, encompassing both hardware and software. It has five modes of operation (Design, Model Validation, Build Simulation, Simulate Syste...
MSE
2005
IEEE
14 years 1 months ago
2005
IEEE
This paper describes the authors experience with teaching VHDL (and more recently, Verilog) to undergraduate and graduate students at WPI and to engineers through various short co...
DATE
2007
IEEE
14 years 2 months ago
2007
IEEE
This paper describes a DfT solution for modern seriallink transceivers. We first summarize the architectures of the Crosstalk Canceller and the Equalizer used in advanced transcei...
CODES
2007
IEEE
13 years 11 months ago
2007
IEEE
Energy consumption is a major issue in dynamically reconfigurable systems because of the high power requirements during repeated configurations. Hardware designs employ low power ...
ICCAD
1998
IEEE
13 years 12 months ago
1998
IEEE
We consider the problem of scheduling the mixed workload of both sporadic (on-line) and periodic (off-line) tasks on variable voltage processor to optimize power consumption while...