951 search results - page 52 / 191 » Hardware design experiences in ZebraNet |
ICCAD
2008
IEEE
14 years 4 months ago
2008
IEEE
— In today’s complex SoC designs, verification and debugging are becoming ever more crucial and increasingly timeconsuming tasks. The prevalence of embedded memories adds to t...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
- In this paper, we present a design methodology for automatic platform generation of future heterogeneous systems where communication happens via the Network-onChip (NoC) approach...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
With the scaling of technology and higher requirements on performance and functionality, power dissipation is becoming one of the major design considerations in the development of...
ISQED
2003
IEEE
14 years 29 days ago
2003
IEEE
The importance of an interconnect pattern density model in ASIC design flow for a 90nm technology is presented. It is shown that performing the timing analysis at the worst-case c...
DATE
1999
IEEE
14 years 13 hour ago
1999
IEEE
There is an increasing research interest in system level design languages which can carry designers from specification to implementation of system-on-a-chip. Unfortunately, two of...