951 search results - page 73 / 191 » Hardware design experiences in ZebraNet |
ICCAD
1996
IEEE
14 years 2 months ago
1996
IEEE
Many practical routing problems such as BGA, PGA, pin redistribution and test xture routing involve routing with interchangeable pins. These routing problems, especiallypackage la...
ASPDAC
2007
ACM
14 years 2 months ago
2007
ACM
- For sub-90nm technology nodes and below, random fluctuations of within-die physical process properties are also known as random on-chip variation (OCV). It impacts on the VLSI/So...
ASPDAC
2006
ACM
14 years 1 months ago
2006
ACM
- In this paper, we study the relationship between C4 package resonance effects and logical switching timing correlations, which has not been thoroughly investigated in the past. W...
CAV
2001
Springer
14 years 1 months ago
2001
Springer
In this paper we present the application of generalized retiming for temporal property checking. Retiming is a structural transformation that relocates registers in a circuit-based...
CODES
2001
IEEE
14 years 1 months ago
2001
IEEE
Network hardware design is becoming increasingly challenging because more and more demands are put on network bandwidth and throughput requirements, and on the speed with which ne...