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» Hardware efficient architectures for Eigenvalue computation
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FPL
2007
Springer
97views Hardware» more  FPL 2007»
14 years 1 months ago
An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems
Recently, there is a surge of interests in using FPGAs for computer architecture research including applications from emulating and analyzing a new platform to accelerating microa...
Taeweon Suh, Shih-Lien Lu, Hsien-Hsin S. Lee
DAC
2010
ACM
13 years 10 months ago
QuickYield: an efficient global-search based parametric yield estimation with performance constraints
With technology scaling down to 90nm and below, many yield-driven design and optimization methodologies have been proposed to cope with the prominent process variation and to incr...
Fang Gong, Hao Yu, Yiyu Shi, Daesoo Kim, Junyan Re...
MICRO
1998
IEEE
129views Hardware» more  MICRO 1998»
14 years 2 months ago
A Bandwidth-efficient Architecture for Media Processing
Media applications are characterized by large amounts of available parallelism, little data reuse, and a high computation to memory access ratio. While these characteristics are p...
Scott Rixner, William J. Dally, Ujval J. Kapasi, B...
MSE
2000
IEEE
174views Hardware» more  MSE 2000»
14 years 2 months ago
Integrating a Digital Camera in the Home Environment: Architecture and Prototype
Electronic photography is gaining parts of the photography market and tends to replace gradually all argentic photography. The combination of digital camera and computer technolog...
Nadia Bennani
TVLSI
2008
121views more  TVLSI 2008»
13 years 9 months ago
Area-Efficient Arithmetic Expression Evaluation Using Deeply Pipelined Floating-Point Cores
Recently, it has become possible to implement floating-point cores on field-programmable gate arrays (FPGAs) to provide acceleration for the myriad applications that require high-p...
Ronald Scrofano, Ling Zhuo, Viktor K. Prasanna