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SBCCI
2005
ACM
185views VLSI» more  SBCCI 2005»
14 years 1 months ago
Automatic generation of test sets for SBST of microprocessor IP cores
Higher integration densities, smaller feature lengths, and other technology advances, as well as architectural evolution, have made microprocessor cores exceptionally complex. Cur...
Ernesto Sánchez, Matteo Sonza Reorda, Giova...
DATE
2003
IEEE
137views Hardware» more  DATE 2003»
14 years 28 days ago
Dynamic Conditional Branch Balancing during the High-Level Synthesis of Control-Intensive Designs
We present two novel strategies to increase the scope for application of speculative code motions: (1) Adding scheduling steps dynamically during scheduling to conditional branche...
Sumit Gupta, Nikil D. Dutt, Rajesh K. Gupta, Alexa...
DATE
2010
IEEE
156views Hardware» more  DATE 2010»
14 years 22 days ago
Domain specific architecture for next generation wireless communication
—In order to solve the challenges in processor design for the next generation wireless communication systems, this paper first proposes a system level design flow for communicati...
Botao Zhang, Hengzhu Liu, Heng Zhao, Fangzheng Mo,...
CAV
2001
Springer
83views Hardware» more  CAV 2001»
14 years 5 days ago
Iterating Transducers
Regular languages have proved useful for the symbolic state exploration of infinite state systems. They can be used to represent infinite sets of system configurations; the tran...
Dennis Dams, Yassine Lakhnech, Martin Steffen
APCCAS
2006
IEEE
252views Hardware» more  APCCAS 2006»
13 years 9 months ago
A Display Order Oriented Scalable Video Decoder
As network technologies advance, Scalable Video Coding (SVC) has become increasingly popular due to its universal multimedia access capability and competitive compression performan...
Jia-Bin Huang, Yu-Kun Lin, Tian-Sheuan Chang