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» Hardware support for code integrity in embedded processors
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ISCAS
2006
IEEE
124views Hardware» more  ISCAS 2006»
14 years 1 months ago
Systematic design flow for dynamic data management in visual texture decoder of MPEG-4
Abstract— There is a clear trend of future embedded systems in moving toward wireless, multimedia, multi-functional and ubiquitous applications. This emerges new challenges in th...
Alexandros Bartzas, Miguel Peón Quiró...
CODES
2005
IEEE
14 years 1 months ago
Comparing the size of .NET applications with native code
Byte-code based languages are slowly becoming adopted in embedded domains because of improved security and portability. Another potential reason for their adoption is the reputati...
Roberto Costa, Erven Rohou
ISCA
2003
IEEE
101views Hardware» more  ISCA 2003»
14 years 27 days ago
Overcoming the Limitations of Conventional Vector Processors
Despite their superior performance for multimedia applications, vector processors have three limitations that hinder their widespread acceptance. First, the complexity and size of...
Christoforos E. Kozyrakis, David A. Patterson
IEEEPACT
2007
IEEE
14 years 1 months ago
Fast Track: Supporting Unsafe Optimizations with Software Speculation
The use of multi-core, multi-processor machines is opening new opportunities for software speculation, where program code is speculatively executed to improve performance at the a...
Kirk Kelsey, Chengliang Zhang, Chen Ding
ISSS
1999
IEEE
131views Hardware» more  ISSS 1999»
13 years 12 months ago
Compressed Code Execution on DSP Architectures
Decreasing the program size has become an important goal in the design of embedded systems target to mass production. This problem has led to a number of efforts aimed at designin...
Paulo Centoducatte, Ricardo Pannain, Guido Araujo