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» Hardware support for code integrity in embedded processors
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MICRO
2006
IEEE
191views Hardware» more  MICRO 2006»
13 years 7 months ago
CAPSULE: Hardware-Assisted Parallel Execution of Component-Based Programs
Since processor performance scalability will now mostly be achieved through thread-level parallelism, there is a strong incentive to parallelize a broad range of applications, inc...
Pierre Palatin, Yves Lhuillier, Olivier Temam
WISES
2004
13 years 9 months ago
Towards a Rapid Prototyping Framework for Architecture Exploration in Embedded Systems
-- In this paper a Rapid Prototyping Framework and next steps towards the support for interactive Architecture Exploration based on the SPEAR processor core (Scalable Processor for...
Martin Jankela, Wolfgang Puffitsch, Wolfgang Huber
CARDIS
2006
Springer
146views Hardware» more  CARDIS 2006»
13 years 11 months ago
SEA: A Scalable Encryption Algorithm for Small Embedded Applications
Most present symmetric encryption algorithms result from a tradeoff between implementation cost and resulting performances. In addition, they generally aim to be implemented effici...
François-Xavier Standaert, Gilles Piret, Ne...
DATE
2007
IEEE
114views Hardware» more  DATE 2007»
14 years 2 months ago
Performance aware secure code partitioning
Many embedded applications exist where decisions are made using sensitive information. A critical issue in such applications is to ensure that data is accessed only by authorized ...
Sri Hari Krishna Narayanan, Mahmut T. Kandemir, Ri...
HPCA
2008
IEEE
14 years 8 months ago
An OS-based alternative to full hardware coherence on tiled CMPs
The interconnect mechanisms (shared bus or crossbar) used in current chip-multiprocessors (CMPs) are expected to become a bottleneck that prevents these architectures from scaling...
Christian Fensch, Marcelo Cintra