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» Heterogeneous behavioral hierarchy for system level designs
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ADHOC
2006
115views more  ADHOC 2006»
13 years 7 months ago
Routing characteristics of ad hoc networks with unidirectional links
Unidirectional links in an ad hoc network can result from factors such as heterogeneity of receiver and transmitter hardware, power control or topology control algorithms, or diff...
Jorjeta G. Jetcheva, David B. Johnson
TVLSI
2010
13 years 2 months ago
C-Pack: A High-Performance Microprocessor Cache Compression Algorithm
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
Xi Chen, Lei Yang, Robert P. Dick, Li Shang, Haris...
RAID
2010
Springer
13 years 6 months ago
Automatic Discovery of Parasitic Malware
Malicious software includes functionality designed to block discovery or analysis by defensive utilities. To prevent correct attribution of undesirable behaviors to the malware, it...
Abhinav Srivastava, Jonathon T. Giffin
CF
2005
ACM
13 years 9 months ago
Drowsy region-based caches: minimizing both dynamic and static power dissipation
Power consumption within the memory hierarchy grows in importance as on-chip data caches occupy increasingly greater die area. Among dynamic power conservation schemes, horizontal...
Michael J. Geiger, Sally A. McKee, Gary S. Tyson
ISPAN
2005
IEEE
14 years 1 months ago
Process Scheduling for the Parallel Desktop
Commodity hardware and software are growing increasingly more complex, with advances such as chip heterogeneity and specialization, deeper memory hierarchies, ne-grained power ma...
Eitan Frachtenberg