238 search results - page 42 / 48 » Hierarchical Interconnect Circuit Models |
ICCAD
2005
IEEE
14 years 4 months ago
2005
IEEE
In this paper we propose a novel analog design optimization methodology to address two key aspects of top-down system-level design: (1) how to optimally compare and select analog ...
VLSID
2010
IEEE
13 years 1 months ago
2010
IEEE
The continuous increase of leakage power consumption
in deep sub-micro technologies necessitates more aggressive
leakage control. Runtime leakage control (RTLC) is effective,
si...
WEBDB
2005
Springer
14 years 1 months ago
2005
Springer
Data fragmentation offers various attractive alternatives to organizing and managing data, and presents interesting characteristics that may be exploited for efficient processing...
LICS
1996
IEEE
13 years 12 months ago
1996
IEEE
We present a formal model for concurrent systems. The model represents synchronous and asynchronous components in a uniform framework that supports compositional (assume-guarantee)...
ISPD
2003
ACM
14 years 29 days ago
2003
ACM
Delay evaluation is always a crucial concern in the VLSI design and it becomes increasingly more critical in the nowadays deep-submicron technology. To obtain an accurate delay va...