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DAC
2005
ACM
13 years 9 months ago
Mixed signal design space exploration through analog platforms
We propose a hierarchical mixed signal design methodology based on the principles of Platform-Based Design (PBD). The methodology is a meet-in-the-middle approach where design com...
Fernando De Bernardinis, Pierluigi Nuzzo, Alberto ...
DAC
2002
ACM
14 years 8 months ago
Petri net modeling of gate and interconnect delays for power estimation
In this paper, a new type of Petri net called Hierarchical Colored Hardware Petri net, to model real-delay switching activity for power estimation is proposed. The logic circuit i...
Ashok K. Murugavel, N. Ranganathan
NIPS
2003
13 years 9 months ago
A Low-Power Analog VLSI Visual Collision Detector
We have designed and tested a single-chip analog VLSI sensor that detects imminent collisions by measuring radially expansive optic flow. The design of the chip is based on a mode...
Reid R. Harrison
AHS
2006
IEEE
95views Hardware» more  AHS 2006»
13 years 11 months ago
A Modular Framework for the Evolution of Circuits on Configurable Transistor Array Architectures
This paper gives an overview over the progress that has been made by the Heidelberg FPTA group within the field of analog evolvable hardware. Achievements are the design of a CMOS...
Martin Trefzer, Jörg Langeheine, Karlheinz Me...
VLSID
2005
IEEE
89views VLSI» more  VLSID 2005»
14 years 8 months ago
Power Optimization in Current Mode Circuits
We propose a method to minimize power dissipation in current-mode CMOS analog and multiple-valued logic (MVL) circuits employing a stack of current comparators. First, we present ...
M. S. Bhat, H. S. Jamadagni