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» Hierarchical Modeling and Simulation of Large Analog Circuit...
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CHINAF
2006
110views more  CHINAF 2006»
13 years 7 months ago
Time-domain analysis methodology for large-scale RLC circuits and its applications
: With soaring work frequency and decreasing feature sizes, VLSI circuits with RLC parasitic components are more like analog circuits and should be carefully analyzed in physical d...
Zuying Luo, Yici Cai, Sheldon X.-D. Tan, Xianlong ...
MTV
2007
IEEE
166views Hardware» more  MTV 2007»
14 years 1 months ago
Application of Automated Model Generation Techniques to Analog/Mixed-Signal Circuits
Abstract—Abstract models of analog/mixed-signal (AMS) circuits can be used for formal verification and system-level simulation. The difficulty of creating these models preclude...
Scott Little, Alper Sen, Chris J. Myers
ASPDAC
2007
ACM
152views Hardware» more  ASPDAC 2007»
13 years 11 months ago
A Graph Reduction Approach to Symbolic Circuit Analysis
A new graph reduction approach to symbolic circuit analysis is developed in this paper. A Binary Decision Diagram (BDD) mechanism is formulated, together with a specially designed ...
Guoyong Shi, Weiwei Chen, C.-J. Richard Shi
DATE
2003
IEEE
114views Hardware» more  DATE 2003»
14 years 24 days ago
Extraction of Piecewise-Linear Analog Circuit Models from Trained Neural Networks Using Hidden Neuron Clustering
This paper presents a new technique for automatically creating analog circuit models. The method extracts - from trained neural networks - piecewise linear models expressing the l...
Simona Doboli, Gaurav Gothoskar, Alex Doboli
DAC
2000
ACM
13 years 12 months ago
An asymptotically constant, linearly bounded methodology for the statistical simulation of analog circuits including component m
Abstract: This paper presents a new statistical methodology to simulate the effect of both inter-die and intra-die variation on the electrical performance of analog integrated circ...
Carlo Guardiani, Sharad Saxena, Patrick McNamara, ...