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WSC
1998
13 years 8 months ago
SEAMS: Simulation Environment for VHDL-AMS
VHDL-AMS is an Analog and Mixed-Signal extension to the Very High Speed Integrated Circuit Hardware Description Language (VHDL). With the standardization of VHDL-AMS, capable and ...
Peter Frey, Kathiresan Nellayappan, Vasudevan Sahn...
ASPDAC
2008
ACM
106views Hardware» more  ASPDAC 2008»
13 years 9 months ago
Hierarchical Krylov subspace reduced order modeling of large RLC circuits
In this paper, we propose a new model order reduction approach for large interconnect circuits using hierarchical decomposition and Krylov subspace projection-based model order re...
Duo Li, Sheldon X.-D. Tan
ISCAS
2007
IEEE
138views Hardware» more  ISCAS 2007»
14 years 1 months ago
A Performance Driven Layout Compaction Optimization Algorithm for Analog Circuits
-- In interconnect-dominated designs, the ability to minimize layout-induced parasitic effects is crucial for rapid design closure. Deep sub-micron effects and ubiquitous interfere...
Henry H. Y. Chan, Zeljko Zilic
DATE
2010
IEEE
122views Hardware» more  DATE 2010»
13 years 7 months ago
Correlation controlled sampling for efficient variability analysis of analog circuits
The Monte Carlo (MC) simulation is a well-known solution to the statistical analysis of analog circuits in the presence of device mismatch. Despite MC's superior accuracy comp...
Javid Jaffari, Mohab Anis
ASPDAC
1998
ACM
97views Hardware» more  ASPDAC 1998»
13 years 11 months ago
A Novel Design Assistant for Analog Circuits
 This paper presents a new design assistant for analog integrated circuits. The interactive tool is implemented in the Design Framework II of Cadence and supports the designer d...
Markus Wolf, Ulrich Kleine, Frédéric...