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ICCAD
2001
IEEE
143views Hardware» more  ICCAD 2001»
14 years 6 months ago
Transient Power Management Through High Level Synthesis
The use of nanometer technologies is making it increasingly important to consider transient characteristics of a circuit’s power dissipation (e.g., peak power, and power gradien...
Vijay Raghunathan, Srivaths Ravi, Anand Raghunatha...
ICCD
2005
IEEE
159views Hardware» more  ICCD 2005»
14 years 2 months ago
Architectural-Level Fault Tolerant Computation in Nanoelectronic Processors
Nanoelectronic devices are expected to have extremely high and variable fault rates; thus future processor architectures based on these unreliable devices need to be built with fa...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
IWAN
2001
Springer
14 years 1 months ago
Deploying an Active Voice Application on a Three-Level Active Network Node Architecture
Active networks have been recently highlighted as a key enabling technology to obtain immense flexibility in terms of network deployment, configurability, and customized packet pro...
Georg Carle, Henning Sanneck, Sebastian Zander, Lo...
BMCBI
2008
132views more  BMCBI 2008»
13 years 9 months ago
Exon level integration of proteomics and microarray data
Background: Previous studies comparing quantitative proteomics and microarray data have generally found poor correspondence between the two. We hypothesised that this might in par...
Danny A. Bitton, Michal J. Okoniewski, Yvonne Conn...
DATE
1997
IEEE
95views Hardware» more  DATE 1997»
14 years 1 months ago
Synthesis of multi-rate and variable rate circuits for high speed telecommunications applications
A design methodology for the synthesis of digital circuits used in high throughput digital modems is presented. The methodology spans digital modem design from the link level to t...
Patrick Schaumont, Serge Vernalde, Luc Rijnders, M...