249 search results - page 6 / 50 » High Level Synthesis of Timed Asynchronous Circuits |
105
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ASPDAC
1995
ACM
15 years 6 months ago
1995
ACM
Most existing high-level synthesis(HLS) systems attempt to generate a circuit from a behavioral description \out of the void", using the entire design space as the search dom...
119
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DAC
2004
ACM
16 years 3 months ago
2004
ACM
Logic duplication, a commonly used synthesis technique to remove trapped inverters in reconvergent paths of Domino circuits, incurs high area and power penalties. In this paper, w...
DATE
2005
IEEE
15 years 8 months ago
2005
IEEE
144
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CHARME
1995
Springer
15 years 6 months ago
1995
Springer
In this paper we present a method formodeling asynchronous digital circuits by timed automata. The constructed timed automata serve as \mechanical" and veri able objects for a...
116
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HYBRID
1994
Springer
15 years 7 months ago
1994
Springer
This paper presents algorithms for the symbolic synthesis of discrete and real-time controllers. At the semantic level the controller is synthesized by nding a winning strategy for...