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FCCM
2006
IEEE
108views VLSI» more  FCCM 2006»
14 years 1 months ago
A Reconfigurable Distributed Computing Fabric Exploiting Multilevel Parallelism
This paper presents a novel reconfigurable data flow processing architecture that promises high performance by explicitly targeting both fine- and course-grained parallelism. This...
Charles L. Cathey, Jason D. Bakos, Duncan A. Buell
HPCN
1997
Springer
13 years 11 months ago
Performance Evaluation of HPCN Applications
The performance attained by parallel programs executed on multiprocessor systems is largely in uenced both by the characteristics of the code and by those of the system architectu...
Alessandro P. Merlo
CODES
2003
IEEE
14 years 28 days ago
A fast parallel reed-solomon decoder on a reconfigurable architecture
This paper presents a software implementation of a very fast parallel Reed-Solomon decoder on the second generation of MorphoSys reconfigurable computation platform, which is targ...
Arezou Koohi, Nader Bagherzadeh, Chengzi Pan
PPAM
2007
Springer
14 years 1 months ago
Parallel Tiled QR Factorization for Multicore Architectures
As multicore systems continue to gain ground in the High Performance Computing world, linear algebra algorithms have to be reformulated or new algorithms have to be developed in or...
Alfredo Buttari, Julien Langou, Jakub Kurzak, Jack...
TJS
2010
145views more  TJS 2010»
13 years 2 months ago
Analyzing and enhancing the parallel sort operation on multithreaded architectures
The Sort operation is a core part of many critical applications. Despite the large efforts to parallelize it, the fact that it suffers from high data-dependencies vastly limits it...
Layali K. Rashid, Wessam Hassanein, Moustafa A. Ha...