83 search results - page 1 / 17 » High-Bandwidth Address Generation Unit |
SAMOS
2007
Springer
14 years 1 months ago
2007
Springer
In this paper we describe an efficient data fetch circuitry for retrieving several operands from a n-bank interleaved memory system in a single machine cycle. The proposed address ...
DATE
2003
IEEE
14 years 23 days ago
2003
IEEE
In this paper we propose a design technique to pipeline cache memories for high bandwidth applications. With the scaling of technology cache access latencies are multiple clock cy...
ISSS
1996
IEEE
13 years 11 months ago
1996
IEEE
An address generation and optimization environment (ADOPT) for distributed memory architectures, is presented. ADOPT is oriented to minimize the area overhead introduced by the us...
ASPDAC
2009
ACM
14 years 2 months ago
2009
ACM
— The enhanced packing densities facilitated by 3D integrated circuit technology also has an unwanted side-effect, in the form of increasing the amount of current per unit footpr...
ISCA
2003
IEEE
14 years 23 days ago
2003
IEEE
Despite their superior performance for multimedia applications, vector processors have three limitations that hinder their widespread acceptance. First, the complexity and size of...