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» High-level design for asynchronous logic
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AADEBUG
2005
Springer
14 years 1 months ago
An integrated debugging environment for reprogrammble hardware systems
Reprogrammable hardware systems are traditionally very difficult to debug due to their high level of parallelism. In our solution to this problem, features are inserted into the u...
Kevin Camera, Hayden Kwok-Hay So, Robert W. Broder...
POPL
2012
ACM
12 years 3 months ago
Higher-order functional reactive programming in bounded space
Functional reactive programming (FRP) is an elegant and successful approach to programming reactive systems declaratively. The high levels of abstraction and expressivity that mak...
Neelakantan R. Krishnaswami, Nick Benton, Jan Hoff...
FPL
2004
Springer
205views Hardware» more  FPL 2004»
14 years 28 days ago
A System Level Resource Estimation Tool for FPGAs
Abstract. High level modeling tools make it possible to synthesize a high performance FPGA design directly from a Simulink model. Accurate estimates of the FPGA resources required ...
Changchun Shi, James Hwang, Scott McMillan, Ann Ro...
FAC
2000
114views more  FAC 2000»
13 years 7 months ago
Representational Reasoning and Verification
Formal approaches to the design of interactive systems rely on reasoning about properties of the t a very high level of abstraction. Specifications to support such an approach typi...
Gavin J. Doherty, José Creissac Campos, Mic...
DAC
2012
ACM
11 years 10 months ago
A metric for layout-friendly microarchitecture optimization in high-level synthesis
In this work we address the problem of managing interconnect timing in high-level synthesis by generating a layoutfriendly microarchitecture. A metric called spreading score is pr...
Jason Cong, Bin Liu