5 search results - page 1 / 1 » High-level interconnect model for the quantum logic array ar... |
JETC
2008
13 years 11 months ago
2008
FDL
2003
IEEE
14 years 4 months ago
2003
IEEE
Reconfigurable Systolic Arrays are a generalization of Systolic Arrays where node operations and interconnections can be redefined even at run time. This flexibility increases the...
DFT
1999
IEEE
14 years 3 months ago
1999
IEEE
The inherent redundancy and in-the-field reconfiguration capabilities of field programmable gate arrays (FPGAs) provide alternatives to integrated circuit redundancy-based fault r...
ASPDAC
2009
ACM
2009
ACM
Reconfigurable double gate carbon nanotube field effect transistor based nanoelectronic architecture
14 years 2 months ago
-- Carbon nanotubes (CNTs) and carbon nanotube field effect transistors (CNFETs) have demonstrated extraordinary properties and are widely accepted as the building blocks of next g...
FPGA
2003
ACM
14 years 4 months ago
2003
ACM
This paper describes the hardware implementation of a real-time, large-scale, multi-chip FPGA (Field Programmable Gate Array) based emulation engine with a capacity of 10 million ...