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HPCA
2006
IEEE
14 years 9 months ago
Reducing resource redundancy for concurrent error detection techniques in high performance microprocessors
With reducing feature size, increasing chip capacity, and increasing clock speed, microprocessors are becoming increasingly susceptible to transient (soft) errors. Redundant multi...
Sumeet Kumar, Aneesh Aggarwal
DSD
2009
IEEE
145views Hardware» more  DSD 2009»
14 years 3 months ago
High Performance Image Processing on a Massively Parallel Processor Array
Multicore and manycore processors are the new wave of computing, offering high performance by using large numbers of simple processors. In this paper, we describe the implementati...
Roberto R. Osorio, Cesar Diaz-Resco, Javier D. Bru...
3DPVT
2006
IEEE
212views Visualization» more  3DPVT 2006»
14 years 2 months ago
High-Performance Multi-View Reconstruction
We present a high performance reconstruction approach, which generates true 3D models from multiple views with known camera parameters. The complete pipeline from depth map genera...
Christopher Zach, Mario Sormann, Konrad F. Karner
CHI
1999
ACM
14 years 1 months ago
The Design and Evaluation of a High-Performance Soft Keyboard
The design and evaluation of a high performance soft keyboard for mobile systems are described. Using a model to predict the upper-bound text entry rate for soft keyboards, we des...
I. Scott MacKenzie, Shawn X. Zhang
DSN
2004
IEEE
14 years 15 days ago
Characterizing the Effects of Transient Faults on a High-Performance Processor Pipeline
The progression of implementation technologies into the sub-100 nanometer lithographies renew the importance of understanding and protecting against single-event upsets in digital...
Nicholas J. Wang, Justin Quek, Todd M. Rafacz, San...