305 search results - page 34 / 61 » Impact of Parallel Workloads on NoC Architecture Design |
133
Voted
DAC
1996
ACM
15 years 9 months ago
1996
ACM
The advent of parallel executing Address Calculation Units (ACUs) in Digital Signal Processor (DSP) and Application Specific InstructionSet Processor (ASIP) architectures has made...
175
click to vote
IPPS
2003
IEEE
15 years 10 months ago
2003
IEEE
ShareStreams (Scalable Hardware Architectures for Stream Schedulers) is a canonical architecture for realizing a range of scheduling disciplines. This paper discusses the design c...
144
click to vote
MICRO
1998
IEEE
15 years 9 months ago
1998
IEEE
The inherent instruction-level parallelism (ILP) of current applications (specially those based on floating point computations) has driven hardware designers and compilers writers...
155
click to vote
ISCA
2010
IEEE
15 years 9 months ago
2010
IEEE
Chip Multiprocessors (CMPs) are now commodity hardware, but commoditization of parallel software remains elusive. In the near term, the current trend of increased coreper-socket c...
161
Voted
ICRA
2005
IEEE
15 years 11 months ago
2005
IEEE
—A new lightweight planar parallel platform aims to greatly improve operational speed of electronic manufacturing process and to realize a “smart parallel platform” through t...