305 search results - page 6 / 61 » Impact of Parallel Workloads on NoC Architecture Design |
FPL
2008
Springer
13 years 9 months ago
2008
Springer
For the next generation of multi-core processors, the onchip interconnection networks must be efficient to achieve high data throughput and performance. Moreover, these interconne...
ISCAS
2005
IEEE
14 years 1 months ago
2005
IEEE
— Fast Fourier transform (FFT) algorithms are used in a wide variety of digital signal processing applications and many of these require high-performance parallel implementations...
DAC
2011
ACM
12 years 7 months ago
2011
ACM
Process Variation (PV) is increasingly threatening the reliability of Networks-on-Chips. Thus, various resilient router designs have been recently proposed and evaluated. However,...
MSE
2002
IEEE
14 years 12 days ago
2002
IEEE
This paper presents the study of running several core multimedia applications on a simultaneous multithreading (SMT) architecture and derives design principles for multimedia soft...
ISQED
2006
IEEE
14 years 1 months ago
2006
IEEE
As transistor counts keep increasing and clock frequencies rise, high power consumption is becoming one of the most important obstacles, preventing further scaling and performance...