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COMPSEC
2010
142views more  COMPSEC 2010»
13 years 4 months ago
Provably correct Java implementations of Spi Calculus security protocols specifications
Spi Calculus is an untyped high level modeling language for security protocols, used for formal protocols specification and verification. In this paper, a type system for the Spi ...
Alfredo Pironti, Riccardo Sisto
ASYNC
2007
IEEE
154views Hardware» more  ASYNC 2007»
14 years 1 months ago
Design of a High-Speed Asynchronous Turbo Decoder
This paper explores the advantages of high performance asynchronous circuits in a semi-custom standard cell environment for high-throughput turbo coding. Turbo codes are high-perf...
Pankaj Golani, Georgios D. Dimou, Mallika Prakash,...
RECONFIG
2009
IEEE
269views VLSI» more  RECONFIG 2009»
14 years 2 months ago
A 10 Gbps OTN Framer Implementation Targeting FPGA Devices
Abstract—Integrated circuits for very high-speed telecommunication protocols often use ASICs, due to their strict timing constraints. This scenario is changing, since modern FPGA...
Guilherme Guindani, Frederico Ferlini, Jeferson Ol...
ARITH
1999
IEEE
13 years 11 months ago
High-Speed Inverse Square Roots
Inverse square roots are used in several digital signal processing, multimedia, and scientific computing applications. This paper presents a high-speed method for computing invers...
Michael J. Schulte, Kent E. Wires
ARC
2009
Springer
134views Hardware» more  ARC 2009»
13 years 12 months ago
A HyperTransport 3 Physical Layer Interface for FPGAs
Abstract. This paper presents the very first implementation of a HyperTransport 3 physical layer interface for Field Programmable Gate Arrays. HyperTransport is a low latency, high...
Heiner Litz, Holger Fröning, Ulrich Brün...