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» Implementation of the MLP Kernel
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ASPLOS
2010
ACM
14 years 4 months ago
The Scalable Heterogeneous Computing (SHOC) benchmark suite
Scalable heterogeneous computing systems, which are composed of a mix of compute devices, such as commodity multicore processors, graphics processors, reconfigurable processors, ...
Anthony Danalis, Gabriel Marin, Collin McCurdy, Je...
WOSP
2010
ACM
14 years 4 months ago
Reducing performance non-determinism via cache-aware page allocation strategies
Performance non-determinism in computer systems complicates evaluation, use, and even development of these systems. In performance evaluation via benchmarking and simulation, nond...
Michal Hocko, Tomás Kalibera
NOCS
2009
IEEE
14 years 4 months ago
A GALS many-core heterogeneous DSP platform with source-synchronous on-chip interconnection network
This paper presents a many-core heterogeneous computational platform that employs a GALS compatible circuit-switched on-chip network. The platform targets streaming DSP and embedd...
Anh T. Tran, Dean Truong, Bevan M. Baas
IEEEPACT
2009
IEEE
14 years 4 months ago
Soft-OLP: Improving Hardware Cache Performance through Software-Controlled Object-Level Partitioning
—Performance degradation of memory-intensive programs caused by the LRU policy’s inability to handle weaklocality data accesses in the last level cache is increasingly serious ...
Qingda Lu, Jiang Lin, Xiaoning Ding, Zhao Zhang, X...
ARCS
2009
Springer
14 years 4 months ago
Improving Memory Subsystem Performance Using ViVA: Virtual Vector Architecture
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
Joseph Gebis, Leonid Oliker, John Shalf, Samuel Wi...