857 search results - page 119 / 172 » Implementing a STARI chip |
ISCAS
2007
IEEE
14 years 4 months ago
2007
IEEE
Abstract— This paper presents the design of a special purpose processor with Elliptic Curve Digital Signature Algorithm (ECDSA) functionality. This digital signature generation d...
IEEEPACT
2006
IEEE
14 years 3 months ago
2006
IEEE
Fast instruction decoding is a challenge for the design of CISC microprocessors. A well-known solution to overcome this problem is using a trace cache. It stores and fetches alrea...
MICRO
2006
IEEE
14 years 3 months ago
2006
IEEE
With the trend towards increasing number of processor cores in future chip architectures, scalable directory-based protocols for maintaining cache coherence will be needed. Howeve...
MICRO
2006
IEEE
14 years 3 months ago
2006
IEEE
Growing on-chip wire delays will cause many future microarchitectures to be distributed, in which hardware resources within a single processor become nodes on one or more switched...
CODES
2005
IEEE
14 years 3 months ago
2005
IEEE
This paper presents a novel approach for multiprocess synthesis supporting well-tailored module integration at system level. The goal is to extend the local scope of existing arch...