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ISCA
2006
IEEE
182views Hardware» more  ISCA 2006»
14 years 3 months ago
Cooperative Caching for Chip Multiprocessors
This paper presents CMP Cooperative Caching, a unified framework to manage a CMP’s aggregate on-chip cache resources. Cooperative caching combines the strengths of private and ...
Jichuan Chang, Gurindar S. Sohi
VLSID
2002
IEEE
106views VLSI» more  VLSID 2002»
14 years 10 months ago
SWASAD: An ASIC Design for High Speed DNA Sequence Matching
This paper presents the Smith and Waterman Algorithm-Specific ASIC Design (SWASAD) project. This is a hardware solution that implements the S&W algorithm.. The SWASAD is an imp...
Tony Han, Sri Parameswaran
IJCNN
2000
IEEE
14 years 2 months ago
A 2D Neuromorphic VLSI Architecture for Modeling Selective Attention
Selectiveattentionis a mechanismsused to sequentiallyselectthe spatiallocationsof salientregionsin the sensor’sfieldof view. This mechanism overcomesthe problem of flooding limi...
Giacomo Indiveri
IPPS
1998
IEEE
14 years 2 months ago
HOSMII: A Virtual Hardware Integrated with DRAM
WASMII, a virtual hardware system that executes data ow algorithms, is based on an MPLD, an extended FPGA with multiple sets of con guration SRAM. Although we have developed an emu...
Yuichiro Shibata, Hidenori Miyazaki, Xiao-ping Lin...
JIPS
2006
129views more  JIPS 2006»
13 years 9 months ago
Automatic Reading System for On-off Type DNA Chip
: In this study we propose an automatic reading system for diagnostic DNA chips. We define a general specification for an automatic reading system and propose a possible implementa...
Munho Ryu, Jong Dae Kim, Jongwon Kim