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ISCA
1993
IEEE
137views Hardware» more  ISCA 1993»
14 years 1 months ago
Architectural Support for Translation Table Management in Large Address Space Machines
Virtual memoy page translation tables provide mappings from virtual to physical addresses. When the hardware controlled Tratmlation L.ookaside Buffers (TLBs) do not contain a tran...
Jerome C. Huck, Jim Hays
MICRO
2000
IEEE
68views Hardware» more  MICRO 2000»
14 years 1 months ago
Efficient checker processor design
The design and implementation of a modern microprocessor creates many reliability challenges. Designers must verify the correctness of large complex systems and construct implemen...
Saugata Chatterjee, Christopher T. Weaver, Todd M....
CVPR
1998
IEEE
14 years 11 months ago
Real-Time 2-D Feature Detection on a Reconfigurable Computer
We have designed and implemented a system for real-time detection of 2-D features on a reconfigurable computer based on Field Programmable Gate Arrays (FPGA `s). We envision this ...
Arrigo Benedetti, Pietro Perona
LCTRTS
2000
Springer
14 years 15 days ago
Approximation of Worst-Case Execution Time for Preemptive Multitasking Systems
The control system of many complex mechatronic products requires for each task the Worst Case Execution Time (WCET), which is needed for the scheduler's admission tests and su...
Matteo Corti, Roberto Brega, Thomas R. Gross
DATE
2008
IEEE
165views Hardware» more  DATE 2008»
14 years 3 months ago
TinyTimber, Reactive Objects in C for Real-Time Embedded Systems
Embedded systems are often operating under hard real-time constraints. Such systems are naturally described as time-bound reactions to external events, a point of view made manife...
Per Lindgren, Johan Eriksson, Simon Aittamaa, Joha...