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ASPLOS
2004
ACM
14 years 1 months ago
Secure program execution via dynamic information flow tracking
Dynamic information flow tracking is a hardware mechanism to protect programs against malicious attacks by identifying spurious information flows and restricting the usage of sp...
G. Edward Suh, Jae W. Lee, David Zhang, Srinivas D...
FPL
2009
Springer
107views Hardware» more  FPL 2009»
14 years 5 days ago
An FPGA based verification platform for HyperTransport 3.x
In this paper we present a verification platform designed for HyperTransport 3.x (HT3) applications. HyperTransport 3.x is a very low latency and high bandwidth chip-tochip interc...
Heiner Litz, Holger Fröning, Maximilian Th&uu...
SIGMETRICS
2008
ACM
140views Hardware» more  SIGMETRICS 2008»
13 years 7 months ago
Scalable VPN routing via relaying
Enterprise customers are increasingly adopting MPLS (Multiprotocol Label Switching) VPN (Virtual Private Network) service that offers direct any-to-any reachability among the cust...
Changhoon Kim, Alexandre Gerber, Carsten Lund, Dan...
ICCAD
2004
IEEE
114views Hardware» more  ICCAD 2004»
14 years 4 months ago
High-level synthesis using computation-unit integrated memories
Abstract— High-level synthesis (HLS) of memory-intensive applications has featured several innovations in terms of enhancements made to the basic memory organization and data lay...
Chao Huang, Srivaths Ravi, Anand Raghunathan, Nira...
VISUALIZATION
2005
IEEE
14 years 1 months ago
A Shader-Based Parallel Rendering Framework
Existing parallel or remote rendering solutions rely on communicating pixels, OpenGL commands, scene-graph changes or application-specific data. We propose an intermediate soluti...
Jérémie Allard, Bruno Raffin