99 search results - page 11 / 20 » Implementing and evaluating nested parallel transactions in ... |
IEEEPACT
2009
IEEE
14 years 2 months ago
2009
IEEE
—Software testing is hard. The emergence of multicore architectures and the proliferation of bugprone multithreaded software makes testing even harder. To this end, researchers h...
ANCS
2010
ACM
13 years 5 months ago
2010
ACM
Software packet processing is becoming more important to enable differentiated and rapidly-evolving network services. With increasing numbers of programmable processor and acceler...
ASPLOS
2011
ACM
12 years 11 months ago
2011
ACM
Transactional memory (TM) is a promising synchronization mechanism for the next generation of multicore processors. Best-effort Hardware Transactional Memory (HTM) designs, such a...
IPPS
2010
IEEE
13 years 5 months ago
2010
IEEE
Abstract--Software transactional memory (STM) algorithms often rely on centralized components to achieve atomicity, isolation and consistency. In a distributed setting, centralized...
HPCA
2007
IEEE
14 years 8 months ago
2007
IEEE
Transactional Memory (TM) provides mechanisms that promise to simplify parallel programming by eliminating the need for locks and their associated problems (deadlock, livelock, pr...