525 search results - page 14 / 105 » Improved Circular Layouts |
ISCAS
2007
IEEE
14 years 1 months ago
2007
IEEE
Abstract– This paper presents an improved topological algorithm for device-level analog placement with symmetry constraints. Based on the exploration of symmetric-feasible sequen...
EUC
2006
Springer
13 years 11 months ago
2006
Springer
As the ever-increasing gap between the speed of processor and the speed of memory has become the cause of one of primary bottlenecks of computer systems, modern architecture system...
APVIS
2006
13 years 8 months ago
2006
A common problem in visualising some networks is the presence of localised high density areas in an otherwise sparse graph. Applying common graph drawing algorithms on such networ...
TCAD
2010
13 years 2 months ago
2010
Starting from the 90nm technology node, process induced stress has played a key role in the design of highperformance devices. The emergence of source/drain silicon germanium (S/D ...
IV
2010
IEEE
13 years 5 months ago
2010
IEEE
Abstract—Bipartite graphs are often used to illustrate relationships between two sets of data, such as web pages and visitors. At the same time, information is often organized hi...