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» Improved multiprocessor global schedulability analysis
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DATE
1999
IEEE
73views Hardware» more  DATE 1999»
14 years 2 months ago
Channel-Based Behavioral Test Synthesis for Improved Module Reachability
We introduce a novel behavioral test synthesis methodology that attempts to increase module reachability, driven by powerful global design path analysis. Based on the notion of tr...
Yiorgos Makris, Alex Orailoglu
ICS
2010
Tsinghua U.
13 years 8 months ago
An approach to resource-aware co-scheduling for CMPs
We develop real-time scheduling techniques for improving performance and energy for multiprogrammed workloads that scale nonuniformly with increasing thread counts. Multithreaded ...
Major Bhadauria, Sally A. McKee
CODES
2007
IEEE
14 years 4 months ago
Three-dimensional multiprocessor system-on-chip thermal optimization
3D stacked wafer integration has the potential to improve multiprocessor system-on-chip (MPSoC) integration density, performance, and power efficiency. However, the power density...
Chong Sun, Li Shang, Robert P. Dick
DAC
2010
ACM
14 years 1 months ago
Performance yield-driven task allocation and scheduling for MPSoCs under process variation
With the ever-increasing transistor variability in CMOS technology, it is essential to integrate variation-aware performance analysis into the task allocation and scheduling proce...
Lin Huang, Qiang Xu
ICPADS
2002
IEEE
14 years 2 months ago
Evaluating and Improving Performance of Multimedia Applications on Simultaneous Multi-Threading
This paper presents the study and results of running several core multimedia applications on a simultaneous multithreading (SMT) architecture, including some detailed analysis ran...
Yen-Kuang Chen, Eric Debes, Rainer Lienhart, Matth...