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» Improvement of ASIC Design Processes
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ASPDAC
2005
ACM
104views Hardware» more  ASPDAC 2005»
13 years 9 months ago
Skew scheduling and clock routing for improved tolerance to process variations
The synthesis of clock network in the presence of process variation is becoming a vital design issue towards the performance of digital circuits. In this paper, we propose a clock ...
Ganesh Venkataraman, Cliff C. N. Sze, Jiang Hu
ISJGP
2010
13 years 4 months ago
On the Hardware Implementation Cost of Crypto-Processors Architectures
A variety of modern technologies such as networks, Internet, and electronic services demand private and secure communications for a great number of everyday transactions. Security ...
Nicolas Sklavos
FPGA
2006
ACM
131views FPGA» more  FPGA 2006»
13 years 11 months ago
Yield enhancements of design-specific FPGAs
The high unit cost of FPGA devices often deters their use beyond the prototyping stage. Efforts have been made to reduce the part-cost of FPGA devices, resulting in the developmen...
Nicola Campregher, Peter Y. K. Cheung, George A. C...
ISCAS
2007
IEEE
165views Hardware» more  ISCAS 2007»
14 years 1 months ago
A 4-Bits Trimmed CMOS Bandgap Reference with an Improved Matching Modeling Design
—Component tolerances and mismatches due to process variations severely degrade the performance of bandgap reference (BGR) circuits. In this paper, we describe the design of a BG...
Juan Pablo Martinez Brito, Sergio Bampi, Hamilton ...
CORR
2007
Springer
133views Education» more  CORR 2007»
13 years 7 months ago
Virtual Manufacturing : Tools for improving Design and Production
: The research area “Virtual Manufacturing” can be defined as an integrated manufacturing environment which can enhance one or several levels of decision and control in manufac...
Philippe Dépincé, Damien Chablat, Pe...