Sciweavers

2201 search results - page 224 / 441
» Improvement of ASIC Design Processes
Sort
View
VLSID
2002
IEEE
136views VLSI» more  VLSID 2002»
16 years 4 months ago
Buffered Routing Tree Construction under Buffer Placement Blockages
Interconnect delay has become a critical factor in determining the performance of integrated circuits. Routing and buffering are powerful means of improving the circuit speed and ...
Wei Chen, Massoud Pedram, Premal Buch
SIGMOD
2007
ACM
144views Database» more  SIGMOD 2007»
16 years 4 months ago
Efficient xml data dissemination with piggybacking
Content-based dissemination of XML data using the publishsubscribe paradigm is an effective means to deliver relevant data to interested data consumers. To meet the performance ch...
Chee Yong Chan, Yuan Ni
ICAC
2007
IEEE
15 years 10 months ago
SLA Decomposition: Translating Service Level Objectives to System Level Thresholds
In today’s complex and highly dynamic computing environments, systems/services have to be constantly adjusted to meet Service Level Agreements (SLAs) and to improve resource uti...
Yuan Chen, Subu Iyer, Xue Liu, Dejan S. Milojicic,...
CHI
2010
ACM
15 years 9 months ago
Early explorations of CAT: canine amusement and training
Cross-species computer applications have a history of blended science and humor, despite the real potential for improving the canine-human bond. New activities available to humans...
Chadwick A. Wingrave, Jeremy Rose, Todd Langston, ...
ISCA
2003
IEEE
88views Hardware» more  ISCA 2003»
15 years 9 months ago
Dynamically Managing the Communication-Parallelism Trade-off in Future Clustered Processors
Clustered microarchitectures are an attractive alternative to large monolithic superscalar designs due to their potential for higher clock rates in the face of increasingly wire-d...
Rajeev Balasubramonian, Sandhya Dwarkadas, David H...