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» Improvement of ASIC Design Processes
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DATE
2000
IEEE
105views Hardware» more  DATE 2000»
13 years 12 months ago
Yield Improvement and Repair Trade-Off for Large Embedded Memories
In this paper, we give an overview of the trade-off to improve yield and optimize silicon manufacturing cost. The specific technology focus is on large embedded memories in comple...
Yervant Zorian
ESTIMEDIA
2003
Springer
14 years 20 days ago
Perception Coprocessors for Embedded Systems
Recognizing speech, gestures, and visual features are important interface capabilities for embedded mobile systems. Perception algorithms have many traits in common with more conv...
Binu K. Mathew, Al Davis, Ali Ibrahim
ASAP
2003
IEEE
108views Hardware» more  ASAP 2003»
14 years 22 days ago
Physical Planning for On-Chip Multiprocessor Networks and Switch Fabrics
On-chip implementation of multiprocessor systems requires the planarization of the interconnect network onto the silicon floorplan. Manual floorplanning approaches will become i...
Terry Tao Ye, Giovanni De Micheli
IC
2003
13 years 8 months ago
Improving the Performance of Grid-Enabled MPI by Intelligent Message Compression
In the Grid computing, one of the most important issues related to the Message Passing Interface (MPI) is to guarantee the expected performance in the wide area networks. To achie...
Hwang-Jik Lee, Kyung-Lang Park, Kwang-Won Koh, Oh-...
VLSID
2008
IEEE
225views VLSI» more  VLSID 2008»
14 years 7 months ago
Formal Verification of a Public-Domain DDR2 Controller Design
This paper demonstrates a formal verificationplanning process and presents associated verification strategy that we believe is an essential (yet often neglected) step in an ASIC o...
Abhishek Datta, Vigyan Singhal