13 search results - page 1 / 3 » Improving FPGA Performance for Carry-Save Arithmetic |
TVLSI
2010
13 years 5 months ago
2010
The selective use of carry-save arithmetic, where appropriate, can accelerate a variety of arithmetic-dominated circuits. Carry-save arithmetic occurs naturally in a variety of DSP...
ARC
2006
Springer
14 years 2 months ago
2006
Springer
This paper presents a reconfigurable hardware architecture for Public-key cryptosystems. By changing the connections of coarse grain Carry-Save Adders (CSAs), the datapath provides...
FPGA
2008
ACM
14 years 15 days ago
2008
ACM
To improve FPGA performance for arithmetic circuits, this paper proposes a new architecture for FPGA logic cells that includes a 6:2 compressor. The new cell features additional f...
FPGA
2008
ACM
14 years 1 days ago
2008
ACM
The Field Programmable Counter Array (FPCA) was introduced to improve FPGA performance for arithmetic circuits. An FPCA is a reconfigurable IP core that can be integrated into an ...
FPL
2006
Springer
14 years 2 months ago
2006
Springer
An improved FPGA implementation of an electronic cochlea filter is presented. We show that by using decimation, the computations of the electronic cochlea can be reduced. Furtherm...