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» Improving IPC by Kernel Design
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ISCA
2005
IEEE
119views Hardware» more  ISCA 2005»
14 years 1 months ago
Rescue: A Microarchitecture for Testability and Defect Tolerance
Scaling feature size improves processor performance but increases each device’s susceptibility to defects (i.e., hard errors). As a result, fabrication technology must improve s...
Ethan Schuchman, T. N. Vijaykumar
ICDCSW
2005
IEEE
14 years 1 months ago
Forensix: A Robust, High-Performance Reconstruction System
When computer intrusions occur, one of the most costly, time-consuming, and human-intensive tasks is the analysis and recovery of the compromised system. At a time when the cost o...
Ashvin Goel, Wu-chang Feng, David Maier, Wu-chi Fe...
ISCA
2000
IEEE
93views Hardware» more  ISCA 2000»
13 years 11 months ago
Reconfigurable caches and their application to media processing
High performance general-purpose processors are increasingly being used for a variety of application domains scienti c, engineering, databases, and more recently, media processing...
Parthasarathy Ranganathan, Sarita V. Adve, Norman ...
ICCAD
2001
IEEE
184views Hardware» more  ICCAD 2001»
14 years 4 months ago
CALiBeR: A Software Pipelining Algorithm for Clustered Embedded VLIW Processors
In this paper we describe a software pipelining framework, CALiBeR (Cluster Aware Load Balancing Retiming Algorithm), suitable for compilers targeting clustered embedded VLIW proc...
Cagdas Akturan, Margarida F. Jacome
TCSV
2008
102views more  TCSV 2008»
13 years 7 months ago
The Technique of Prescaled Integer Transform: Concept, Design and Applications
Integer cosine transform (ICT) is adopted by H.264/AVC for its bit-exact implementation and significant complexity reduction compared to the discrete cosine transform (DCT) with an...
Cixun Zhang, Lu Yu, Jian Lou, Wai-kuen Cham, Jie D...