Sciweavers

2032 search results - page 394 / 407
» Improving Java performance using hardware translation
Sort
View
ASAP
2007
IEEE
133views Hardware» more  ASAP 2007»
14 years 1 months ago
GISP: A Transparent Superpage Support Framework for Linux
Though all of the current main-stream OSs have supported superpage to some extent, most of them need runtime information provided by applications, simulator or other tools. Transp...
Ning Qu, Yansong Zheng, Wei Cao, Xu Cheng
ISPASS
2005
IEEE
14 years 1 months ago
Partitioning Multi-Threaded Processors with a Large Number of Threads
Today’s general-purpose processors are increasingly using multithreading in order to better leverage the additional on-chip real estate available with each technology generation...
Ali El-Moursy, Rajeev Garg, David H. Albonesi, San...
SIGMETRICS
2003
ACM
115views Hardware» more  SIGMETRICS 2003»
14 years 20 days ago
Measuring the effects of internet path faults on reactive routing
Empirical evidence suggests that reactive routing systems improve resilience to Internet path failures. They detect and route around faulty paths based on measurements of path per...
Nick Feamster, David G. Andersen, Hari Balakrishna...
DAC
2007
ACM
14 years 8 months ago
A System For Coarse Grained Memory Protection In Tiny Embedded Processors
Many embedded systems contain resource constrained microcontrollers where applications, operating system components and device drivers reside within a single address space with no...
Ram Kumar, Akhilesh Singhania, Andrew Castner, Edd...
CODES
2005
IEEE
14 years 1 months ago
High-level synthesis for large bit-width multipliers on FPGAs: a case study
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
Gang Quan, James P. Davis, Siddhaveerasharan Devar...