We present a memory efficient, practical, systolic, parallel architecture for the complete 0/1 knapsack dynamic programming problem, including backtracking. This problem was inte...
This paper is concerned with a multiresolution representation for maximum intensity projection (MIP) volume rendering based on morphological pyramids which allows progressive refi...
Wladimir J. van der Laan, Andrei Jalba, Jos B. T. ...
Commercial soft processors are unable to effectively exploit the data parallelism present in many embedded systems workloads, requiring FPGA designers to exploit it (laboriously) ...
Peter Yiannacouras, J. Gregory Steffan, Jonathan R...
In this paper, we propose a technique to flexibly implement genetic algorithms for various problems on FPGAs. For the purpose, we propose a basic architecture for GA which consist...
Interest in decimal arithmetic increased considerably in recent years. This paper presents new designs for decimal floating point (DFP) addition, multiplication, fused multiplyad...
Hossam A. H. Fahmy, Ramy Raafat, Amira M. Abdel-Ma...