1045 search results - page 15 / 209 » Improving SHA-2 Hardware Implementations |
ASAP
2007
IEEE
14 years 3 months ago
2007
IEEE
We present a memory efficient, practical, systolic, parallel architecture for the complete 0/1 knapsack dynamic programming problem, including backtracking. This problem was inte...
VISSYM
2007
13 years 11 months ago
2007
This paper is concerned with a multiresolution representation for maximum intensity projection (MIP) volume rendering based on morphological pyramids which allows progressive refi...
FPL
2009
Springer
14 years 1 months ago
2009
Springer
Commercial soft processors are unable to effectively exploit the data parallelism present in many embedded systems workloads, requiring FPGA designers to exploit it (laboriously) ...
FPGA
2006
ACM
14 years 8 days ago
2006
ACM
In this paper, we propose a technique to flexibly implement genetic algorithms for various problems on FPGAs. For the purpose, we propose a basic architecture for GA which consist...
ARITH
2009
IEEE
14 years 3 months ago
2009
IEEE
Interest in decimal arithmetic increased considerably in recent years. This paper presents new designs for decimal floating point (DFP) addition, multiplication, fused multiplyad...