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» Improving Testing Efficiency using Cumulative Test Analysis
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VLSID
2009
IEEE
115views VLSI» more  VLSID 2009»
14 years 8 months ago
Efficient Techniques for Directed Test Generation Using Incremental Satisfiability
Functional validation is a major bottleneck in the current SOC design methodology. While specification-based validation techniques have proposed several promising ideas, the time ...
Prabhat Mishra, Mingsong Chen
JCDL
2009
ACM
133views Education» more  JCDL 2009»
14 years 2 months ago
Cost and benefit analysis of mediated enterprise search
The utility of an enterprise search system is determined by three key players: the information retrieval (IR) system (the search engine), the enterprise users, and the service pro...
Mingfang Wu, James A. Thom, Andrew Turpin, Ross Wi...
BMCBI
2007
147views more  BMCBI 2007»
13 years 7 months ago
Statistical analysis and significance testing of serial analysis of gene expression data using a Poisson mixture model
Background: Serial analysis of gene expression (SAGE) is used to obtain quantitative snapshots of the transcriptome. These profiles are count-based and are assumed to follow a Bin...
Scott D. Zuyderduyn
ET
2002
90views more  ET 2002»
13 years 7 months ago
Test Wrapper and Test Access Mechanism Co-Optimization for System-on-Chip
Test access mechanisms (TAMs) and test wrappers are integral parts of a system-on-chip (SOC) test architecture. Prior research has concentrated on only one aspect of the TAM/wrappe...
Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan M...
ATS
2004
IEEE
109views Hardware» more  ATS 2004»
13 years 11 months ago
Reconfiguration for Enhanced ALternate Test (REALTest) of Analog Circuits
An efficient design for test methodology to increase the test yield of analog circuits is presented. It is assumed that the analog circuits are tested using alternate tests that r...
Ganesh Srinivasan, Shalabh Goyal, Abhijit Chatterj...