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DATE
2005
IEEE
109views Hardware» more  DATE 2005»
14 years 1 months ago
ISEGEN: Generation of High-Quality Instruction Set Extensions by Iterative Improvement
Customization of processor architectures through Instruction Set Extensions (ISEs) is an effective way to meet the growing performance demands of embedded applications. A high-qua...
Partha Biswas, Sudarshan Banerjee, Nikil D. Dutt, ...
IPPS
1997
IEEE
13 years 11 months ago
A Parallel Priority Data Structure with Applications
We present a parallel priority data structure that improves the running time of certain algorithms for problems that lack a fast and work-efficient parallel solution. As a main a...
Gerth Stølting Brodal, Jesper Larsson Tr&au...
ISM
2008
IEEE
110views Multimedia» more  ISM 2008»
14 years 2 months ago
A Hardware-Independent Fast Logarithm Approximation with Adjustable Accuracy
Many multimedia applications rely on the computation of logarithms, for example, when estimating log-likelihoods for Gaussian Mixture Models. Knowing of the demand to compute loga...
Oriol Vinyals, Gerald Friedland
DSD
2009
IEEE
148views Hardware» more  DSD 2009»
14 years 2 months ago
SIMD Architectural Enhancements to Improve the Performance of the 2D Discrete Wavelet Transform
—The 2D Discrete Wavelet Transform (DWT) is a time-consuming kernel in many multimedia applications such as JPEG2000 and MPEG-4. The 2D DWT consists of horizontal filtering alon...
Asadollah Shahbahrami, Ben H. H. Juurlink
ISLPED
2005
ACM
88views Hardware» more  ISLPED 2005»
14 years 1 months ago
PARE: a power-aware hardware data prefetching engine
Aggressive hardware prefetching often significantly increases energy consumption in the memory system. Experiments show that a major fraction of prefetching related energy degrad...
Yao Guo, Mahmoud Ben Naser, Csaba Andras Moritz