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DAC
2006
ACM
14 years 8 months ago
NATURE: a hybrid nanotube/CMOS dynamically reconfigurable architecture
Recent progress on nanodevices, such as carbon nanotubes and nanowires, points to promising directions for future circuit design. However, nanofabrication techniques are not yet m...
Wei Zhang, Niraj K. Jha, Li Shang
ICAS
2008
IEEE
201views Robotics» more  ICAS 2008»
14 years 2 months ago
Distributed Reasoning for Context-Aware Services through Design of an OWL Meta-Model
Abstract—A growing number of applications start using Semantic Web technologies. The base concept in this technology is the use of ontologies, allowing first-order logic reasoni...
Stijn Verstichel, Matthias Strobbe, Pieter Simoens...
FPL
2007
Springer
128views Hardware» more  FPL 2007»
14 years 1 months ago
Embedded Programmable Logic Core Enhancements for System Bus Interfaces
Programmable logic cores (PLCs) offer a means of providing post-fabrication re-configurability to a SoC design. Circuits implemented in a PLC will inevitably have lower timing per...
Bradley R. Quinton, Steven J. E. Wilton
ISCA
2011
IEEE
386views Hardware» more  ISCA 2011»
12 years 11 months ago
Architecting on-chip interconnects for stacked 3D STT-RAM caches in CMPs
Emerging memory technologies such as STT-RAM, PCRAM, and resistive RAM are being explored as potential replacements to existing on-chip caches or main memories for future multi-co...
Asit K. Mishra, Xiangyu Dong, Guangyu Sun, Yuan Xi...
FAST
2008
13 years 10 months ago
Improving I/O Performance of Applications through Compiler-Directed Code Restructuring
Ever-increasing complexity of large-scale applications and continuous increases in sizes of the data they process make the problem of maximizing performance of such applications a...
Mahmut T. Kandemir, Seung Woo Son, Mustafa Karak&o...