873 search results - page 17 / 175 » Improving the Effectiveness of Web Caching |
MICRO
2009
IEEE
14 years 4 months ago
2009
IEEE
3D-integration is a promising technology to help combat the “Memory Wall” in future multi-core processors. Past work has considered using 3D-stacked DRAM as a large last-level...
HPCA
2005
IEEE
14 years 10 months ago
2005
IEEE
The use of large instruction windows coupled with aggressive out-oforder and prefetching capabilities has provided significant improvements in processor performance. In this paper...
ISCA
2005
IEEE
14 years 3 months ago
2005
IEEE
With the ability to place large numbers of transistors on a single silicon chip, manufacturers have begun developing chip multiprocessors (CMPs) containing multiple processor core...
HPCA
2004
IEEE
14 years 10 months ago
2004
IEEE
Recent research suggests that there are large variations in a cache's spatial usage, both within and across programs. Unfortunately, conventional caches typically employ fixe...
EUROPAR
2008
Springer
13 years 11 months ago
2008
Springer
Cache affinity between a process and a processor is observed when the processor cache has accumulated some amount of the process state, i.e., data or instructions. Cache affinity i...