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HPCA
2005
IEEE
16 years 6 months ago
Improving Multiple-CMP Systems Using Token Coherence
Improvements in semiconductor technology now enable Chip Multiprocessors (CMPs). As many future computer systems will use one or more CMPs and support shared memory, such systems ...
Michael R. Marty, Jesse D. Bingham, Mark D. Hill, ...
EUROSEC
2010
ACM
16 years 27 days ago
Improving the accuracy of network intrusion detection systems under load using selective packet discarding
Under conditions of heavy traffic load or sudden traffic bursts, the peak processing throughput of network intrusion detection systems (NIDS) may not be sufficient for inspecting ...
Antonis Papadogiannakis, Michalis Polychronakis, E...
ICS
1999
Tsinghua U.
15 years 10 months ago
Improving the performance of speculatively parallel applications on the Hydra CMP
Hydra is a chip multiprocessor (CMP) with integrated support for thread-level speculation. Thread-level speculation provides a way to parallelize sequential programs without the n...
Kunle Olukotun, Lance Hammond, Mark Willey
ASPDAC
2011
ACM
217views Hardware» more  ASPDAC 2011»
14 years 9 months ago
Realization and performance comparison of sequential and weak memory consistency models in network-on-chip based multi-core syst
This paper studies realization and performance comparison of the sequential and weak consistency models in the network-on-chip (NoC) based distributed shared memory (DSM) multi-cor...
Abdul Naeem, Xiaowen Chen, Zhonghai Lu, Axel Jants...
SIGCOMM
1996
ACM
15 years 10 months ago
A Comparison of Mechanisms for Improving TCP Performance over Wireless Links
Reliable transport protocols such as TCP are tuned to perform well in traditional networks where packet losses occur mostly because of congestion. However, networks with wireless ...
Hari Balakrishnan, Venkata N. Padmanabhan, Sriniva...