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LCTRTS
2007
Springer
14 years 3 months ago
Addressing instruction fetch bottlenecks by using an instruction register file
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
Stephen Roderick Hines, Gary S. Tyson, David B. Wh...
INFOCOM
1999
IEEE
14 years 1 months ago
Enhancing Survivability of Mobile Internet Access Using Mobile IP with Location Registers
The Mobile IP (MIP) protocol for IP version 4 provides continuous Internet connectivity to mobile hosts. However, currently it has some drawbacks in the areas of survivability, per...
Ravi Jain, Thomas Raleigh, Danny Yang, Li-Fung Cha...
DSD
2002
IEEE
110views Hardware» more  DSD 2002»
14 years 2 months ago
A Design for a Low-Power Digital Matched Filter Applicable to W-CDMA
This paper presents a design for a low-power digital matched filter (DMF) applicable to Wideband-Code Division Multiple Access (W-CDMA), which is a Direct-Sequence Spread-Spectrum...
Shoji Goto, Takashi Yamada, Norihisa Takayarna, Yo...
FTDCS
2004
IEEE
14 years 1 months ago
A New Perspective in Defending against DDoS
Distributed denial of service (DDoS) is a major threat to the availability of Internet services. The anonymity allowed by IP networking, together with the distributed, large scale...
Shigang Chen, Randy Chow
ASPDAC
1995
ACM
103views Hardware» more  ASPDAC 1995»
14 years 1 months ago
A scheduling algorithm for multiport memory minimization in datapath synthesis
- In this paper, we present a new scheduling algorithms that generates area-efficient register transfer level datapaths with multiport memories. The proposed scheduling algorithm a...
Hae-Dong Lee, Sun-Young Hwang