Sciweavers

196 search results - page 8 / 40
» Increasing the level of abstraction in FPGA-based designs
Sort
View
SASO
2008
IEEE
14 years 2 months ago
Cells Are Plausible Targets for High-Level Spatial Languages
—High level languages greatly increase the power of a programmer at the cost of programs that consume more s than those written at a lower level of abstraction. This inefficienc...
Jacob Beal, Jonathan Bachrach
ASPDAC
2007
ACM
81views Hardware» more  ASPDAC 2007»
14 years 16 days ago
LEAF: A System Level Leakage-Aware Floorplanner for SoCs
Abstract-- Process scaling and higher leakage power have resulted in increased power densities and elevated die temperatures. Due to the interdependence of temperature and leakage ...
Aseem Gupta, Nikil D. Dutt, Fadi J. Kurdahi, Kamal...
ARCS
2006
Springer
14 years 8 days ago
Dynamic Dictionary-Based Data Compression for Level-1 Caches
Abstract. Data cache compression is actively studied as a venue to make better use of onchip transistors, increase apparent capacity of caches, and hide the long memory latencies. ...
Georgios Keramidas, Konstantinos Aisopos, Stefanos...
ISSS
1995
IEEE
98views Hardware» more  ISSS 1995»
14 years 2 days ago
On the use of VHDL-based behavioral synthesis for telecom ASIC design
higher levels of abstraction, due to the still increasing design complexities that can be expected in the near future. Behavioral synthesis can play a key role in this prospect, as...
Mark Genoe, Paul Vanoostende, Geert van Wauwe
EURODAC
1995
IEEE
151views VHDL» more  EURODAC 1995»
14 years 3 days ago
Model of conceptual design of complex electronic systems
Due to the ever increasing complexity of electronic system (ES) design, the conceptual design phase and its realization in later phases of the design stream have become increasing...
Alexander N. Soloviev, Alexander L. Stempkovsky